1. Field of the Invention
This invention relates to a waveform measuring apparatus that writes measurement data to a memory for waveform data acquisition (hereinafter “acquisition memory”) based on a trigger signal. In a waveform measurement instrument that can write multiple acquisition results by dividing the acquisition memory, such as a digital oscilloscope, this invention provides devices for sequentially referring to measurement data in multiple acquisition memories after the acquisition stops.
2. Description of the Related Art
Related art regarding a waveform measuring apparatus that writes measurement data to an acquisition memory based on a trigger signal is disclosed in publications such as Japanese Unexamined Patent Application, First publication No. 5-119069.
FIG. 2 is a function block diagram of a general configuration of a conventional waveform measuring apparatus. Reference numeral 1 represents a processor that controls the overall apparatus. Reference numeral 2 represents a display unit that creates and displays display data, based on measurement data read from an acquisition memory.
Reference numeral 3 represents a trigger signal generation unit that generates a trigger signal by using an analog signal Ei, that is input to the apparatus, and preset conditions. Reference numeral 4 is an AD conversion unit that adjusts the analog signal Ei input to the apparatus to an appropriate level, samples it, digitizes it, and creates measurement data to be written in the acquisition memory.
Reference numeral 5 represents an acquisition control unit that is controlled by a control signal from the processor 1. Reference numeral 6 represents an acquisition memory having addresses of (n1+n2) bits and a data width of n3 bits. The acquisition memory 6 reads/writes measurement data based on the trigger signal.
In accordance with the control signal from the processor 1, the acquisition control unit 5 executes processing to write measurement data from the AD conversion unit 4 to the acquisition memory 6, and to pass measurement data that is read to the display unit 2.
An upper bit counter 7 and a lower bit counter 8 manage addresses for reading and writing to/from the acquisition memory 6, and are controlled by the acquisition control unit 5.
The upper bit counter 7 specifies the upper n1 bits of an address in the acquisition memory 6; an initial value of the upper bit counter 7 is set by the processor 1 via the acquisition control unit 5, and is incremented by 1 each time the trigger signal is generated.
The lower bit counter 8 specifies the lower n2 bits of an address in the acquisition memory 6; a clock signal is applied to the lower bit counter 8 from the processor 1 via the acquisition control unit 5, shifting the specified address.
When acquiring and writing measurement data, the processor 1 presets an initial value in the upper bit counter 7 via the acquisition control unit 5, and acquisition starts when a trigger signal is input. After acquisition starts, the acquisition control unit 5 supplies a clock to the lower bit counter 8, and the lower bit counter 8 sequentially generates addresses for storing the measurement data in the acquisition memory 6.
The output of the upper bit counter 7 is constant until the trigger signal generation unit 3 outputs the next trigger signal, so that the measurement data is stored within a range where the upper n1 bits of the address in the acquisition memory 6 are determined by the output of the upper bit counter 7.
When the trigger signal generation unit 3 outputs the next trigger signal, the acquisition control unit 5 adds 1 to the set value of the upper bit counter 7, thereby shifting the storage range in the acquisition memory 6 to another area.
If address management in the acquisition memory 6 is executed so that (n1+n2)=10, n1=3, and n2=7, the total number of addresses is 1024; these can be divided into areas of eight groups, each containing 128 addresses, by controlling the upper three bits.
To read and display the measurement data, the upper n1 bits of an address that corresponds to an area being read in the upper bit counter 7 are set by the processor 1 via the acquisition control unit 5, a clock signal of n2 bits is applied to the lower bit counter 8 via the acquisition control unit 5, and the measurement data in that area is read and passed to the display unit 2.
When the set value of the upper bit counter 7 is incremented, the measurement data displayed by the display unit 2 is initialized and new data is displayed. Data can also be overwritten by changing the setting of the display unit 2.
In conventional waveform measuring apparatuses, to read and display measurement data that is obtained by multiple acquisitions and written and stored in multiple areas of an acquisition memory, after acquisition stops, the user must either specify an area for display, then read and display data of one acquisition at a time, or overlap all the data and display them simultaneously.
This makes it impossible to reproduce waveforms that change at high speed with each acquisition, such as switching waveforms that change when a switching regulator circuit activates.